No. You can not adjust this setting on our VCom or VPage units, but don't fret. Our priority settings fall in the middle of the PTPv2 priority spectrum, meaning if you have a different product such as a QSYS Core, you can set that product be be the grand master based upon it's adjustable priority settings compared to the static VPage/VCom priority settings.
Our AES67 enabled VPage and VCom Products (VPage-VP4X, VPage-VP16K, VCom-VC12X, and VCom-VC16K) PTPv2 clocking priorities are set and are not changeable. They are:
Priority 1: 249
Priority 2: 112
Note: They must sit on domain 0 (DFLT .129).
To ensure our VPage or VCom products are not chosen as a master clock in your system, you must set a different product that you'd like to be the master on your network to domain 0 and Priority1 to 0 (or just ensure that it is any number below 249). The lower the number, the higher the priority per the BMC Algorithm.
Note: AES67 requires PTPv2, which is not backwards compatible with PTPv1 (which Dante uses).
Best Master Clock (BMC) Algorithm Details:
In a PTPv2 network, one clock is elected as the Grandmaster. The Grandmaster is the clock from which all other clocks will derive their time. The Grandmaster is selected using a process that involves the BMC - or Best Master Clock algorithm. This algorithm takes into account the following information, prioritized in this order:
1. Priority 1 – the user can assign a specific static-designed priority to each clock, preemptively defining a priority among them. Smaller numeric values indicate higher priority. From 0 - 255. Lowest number wins.
2. Class – each clock is a member of a given class, each class getting its own priority.
3. Accuracy – precision between clock and UTC, in nanoseconds (ns)
4. Variance – variability of the clock
5. Priority 2 – final-defined priority, defining backup order in case the other criteria were not sufficient. Smaller numeric values indicate higher priority. From 0 - 255. Lowest number wins.
6. Unique identifier – MAC address-based selection is used as a tiebreaker when all other properties are equal.
For more details on this subject, check out this wikipedia article: https://en.wikipedia.org/wiki/Precision_Time_Protocol
How to Make your QSYS Core the PTPv2 Grand Master:
By default, the QSYS Core's Priority settings are set to the following:
PTP Priority 1: 254
PTP Priority 2: 100
By comparison, our VPage/VCom Priority 1 is set to 249.
This means that if the settings are not adjusted in QSYS Designer, our VPage or VCom units will always win the algorithm, and your QSYS Core will never become the Grand Master.
To change this, all you must do are adjust these settings in QSYS Designer. Go to File > Design Properties.
Here, you can manually adjust the Priority 1 and Priority 2 settings. Again, you'll want to set Priority 1 to something less than 249. You will also want to make sure that your QoS settings on your network match the settings here, otherwise you could experience audio problems and dropped packets.
For more information about PTPv2 and Clocking Prioirities in the QSC ecosystem, check out this article: https://q-syshelp.qsc.com/Content/Schematic_Library/design_properties.htm
You can see whom is the PTPv2 Grandmaster in Dante Controller, in the Clock Status tab. Look in the AES67 column for this information. Just note, Dante Controller only lists products that your computer can see on the network.
If you're seeing a VPage or VCom product that is still not relinquishing a master status, It's possible that what you're seeing is a VPage that didn't have AES67 enabled and, therefore, is operating via Dante using PTPv1. It won't release it's master if there's no other device on the network operating in PTPv1. Please confirm that all VPages and VCom units have AES67 enabled so they will all operate on PTPv2 protocol.